ADSP-21MOD870中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The ADSP-21mod870 is a single-chip Internet gateway processor optimized for implementation of a complete V.34/56K modem. All data pump and controller functions can be implemented on a single chip, offering the lowest power consumption and highest possible modem port density.

The ADSP-21mod870, shown in the Functional Block Diagram, combines the ADSP-2100 family base architecture (three computational units, data address generators and a program sequencer) with two serial ports, a 16-bit internal DMA port, a byte DMA port, a programmable timer, Flag I/O, extensive interrupt capabilities and on-chip program and data memory.

FEATURES

PERFORMANCE

Complete Single-Chip Internet Gateway Processor (No

External Memory Required)

Implements V.34/V.90 Data/FAX Modem Including

Controller and Datapump

19 ns Instruction Cycle Time @ 3.3 V, 52 MIPS Sustained

Performance

Open Architecture Platform Extensible to Voice Over IP

and Other Applications

Low Power Dissipation, 80 mW (Typical) for Digital

Modem

Power-Down Mode Featuring Low CMOS Standby

Power Dissipation

INTEGRATION

ADSP-2100 Family Code Compatible, with Instruction

Set Extensions

160K Bytes of On-Chip RAM, Configured as 32K Words

On-Chip Program Memory RAM and 32K Words

On-Chip Data Memory RAM

Dual Purpose Program Memory for Both Instruction

and Data Storage

Independent ALU, Multiplier/Accumulator and Barrel

Shifter Computational Units

Two Independent Data Address Generators

Powerful Program Sequencer Provides Zero Overhead

Looping Conditional Instruction Execution

Programmable 16-Bit Interval Timer with Prescaler

100-Lead LQFP with 0.4 Square Inch (256 mm2) Footprint

SYSTEM INTERFACE

16-Bit Internal DMA Port for High Speed Access to

On-Chip Memory (Mode Selectable)

Two Double-Buffered Serial Ports with Companding

Hardware and Automatic Data Buffering

Programmable Multichannel Serial Port Supports

24/32 Channels

Automatic Booting of On-Chip Program Memory

Through Internal DMA Port

Six External Interrupts

13 Programmable Flag Pins Provide Flexible System

Signaling

ICE-Port? Emulator Interface Supports Debugging in

Final Systems