ADSP-SC582W中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The ADSP-SC58x/ADSP-2158x processors are members of the

SHARC? family of products. The ADSP-SC58x processor is

based on the SHARC+ dual core and the Arm? Cortex?-A5

core. The ADSP-SC58x/ADSP-2158x SHARC processors are

members of the SIMD SHARC family of digital signal processors

(DSPs) that feature Analog Devices, Inc., Super Harvard

Architecture?. These 32-bit/40-bit/64-bit floating-point processors

are optimized for high performance audio/floating-point

applications with large, on-chip, static random-access memory

(SRAM), multiple internal buses that eliminate input/output

(I/O) bottlenecks, and innovative digital audio interfaces (DAI).

New additions to the SHARC+ core include cache enhancements

and branch prediction, while maintaining instruction set

compatibility to previous SHARC products.

By integrating a set of industry leading system peripherals and

memory (see Table 1, Table 2, and Table 3), the Arm Cortex-A5

and SHARC processor is the platform of choice for applications

that require programmability similar to reduced instruction set

computing (RISC), multimedia support, and leading edge signal

processing in one integrated package. These applications span a

wide array of markets, including automotive, professional

audio, and industrial-based applications that require high floating-

point performance.

Table 2 provides comparison information for features that vary

across the standard processors. (N/A in the table means not applicable.)

Table 3 provides comparison information for features that vary

across the automotive processors. (N/A in the table means not applicable.)

ADDITIONAL FEATURES

Security and Protection

Cryptographic hardware accelerators

Fast secure boot with IP protection

Support for Arm TrustZone

Accelerators

High performance pipelined FFT/IFFT engine

FIR, IIR, HAE, SINC offload engines

AEC-Q100 qualified for automotive applications