AFE7768D中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

1 Features

? Quad (AFE776xD) / Dual (AFE7728D) transmitters

based on 0-IF up-conversion architecture:

– Up to 650 MHz (AFE77x8D) / 730 MHz

(AFE7769D) of RF transmitted DPD expansion

bandwidth per chain

? Quad (AFE776xD) / Dual (AFE7728D) receivers

based on 0-IF down-conversion architecture:

– Up to 200 MHz (AFE77x8D) / 300 MHz

(AFE7769D) of RF received bandwidth per

chain

? Feedback chain based on direct RF sampling

architecture:

– Up to 650 MHz (AFE77x8D) / 730 MHz

(AFE7769D) of RF observed DPD expansion

bandwidth

? Integrated CFR/DPD for PA linearization

– Up to 200MHz (AFE77x8D) / 300MHz

(AFE7769D) instantaneous bandwidth

– Up to 650MHz (AFE77x8D) / 730MHz

(AFE7769D) DPD expansion bandwidth

? Integrated CFR/DPD for PA linearization

– Multistage CFR with configurable cancelling

pulses

– Hardware accelerated DPD estimation engine

– Signal Dynamics based corrector for GaN PA

linearization

– Smart data capture

? RF frequency range: 600 MHz to 6 GHz

? Four wideband fractional-N PLL, VCO for TX and

RX LO

? Dedicated integer-N PLL, VCO for data converters

clock generation

? JESD204B and JESD204C SerDes interface

support:

– 4 SerDes transceivers up to 29.5 Gbps

– 8b/10b and 64b/66b encoding

– 16-bit, 12-bit, 24-bit and 32-bit formatting

– Subclass 1 multi-device synchronization

? Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch

2 Applications

? Macro remote radio unit (RRU)

? Small cell base station

? Active antenna system mMIMO (AAS)

? Distributed Antenna Systems (DAS)

? Repeater

3 Description

The AFE77xxD is a pin-compatible family of highperformance,

multichannel transceivers, integrating

four (AFE7768D/AFE7769D) or two (AFE7728D)

direct up-conversion transmitter chains, four

(AFE7768D/AFE7769D) or two (AFE7728D) direct

down-conversion receiver chains, two wideband RF

sampling digitizing auxiliary chains (feedback paths)

and low-power Digital Pre-Distortion (DPD) engine

for Power Amplifier (PA) linearization. The high

dynamic range of the transmitter and receiver chains

enables wireless base stations to transmit and receive

2G, 3G, 4G, and 5G signals. The integrated Crest

Factor Reduction (CFR) unit helps reduce the Peakto-

Average Ratio (PAR) of the input signal for more

efficient transmission through the Power Amplifier.

The integrated hardware accelerated DPD estimator

and corrector provides flexible and efficient DPD

solution for PA linearization. The integrated DPD

engine corrects the distortion due to PA nonlinearity

for signals up to 200MHz (AFE77x8D) / 300MHz

(AFE7769D) instantaneous bandwidth, and within up

to 650MHz (AFE77x8D) / 730MHz (AFE7769D) DPD

expanded bandwidth. A dedicated GaN corrector

addresses the long-term nonlinear memory effects

due to charge trapping of GaN PAs.

The low power dissipation and high density channel

integration of the AFE77xxD allow the device to

address the power and size constraints of 4G and

5G base stations. The wideband and high dynamic

range feedback path can assist the DPD of the power

amplifiers in the transmitter chain through smart data

capture at various intercepting points. The available

29.5Gbps SerDes speed can help reduce the number

of lanes required to transfer the data in and out of the

device.