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AM29520ADCB中文資料超威半導(dǎo)體數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

AM29520ADCB
廠商型號(hào)

AM29520ADCB

功能描述

Multilevel Pipeline Registers

文件大小

583.11 Kbytes

頁(yè)面數(shù)量

12 頁(yè)

生產(chǎn)廠商 Advanced Micro Devices
企業(yè)簡(jiǎn)稱

AMD超威半導(dǎo)體

中文名稱

美國(guó)超威半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

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更新時(shí)間

2025-1-1 23:00:00

AM29520ADCB規(guī)格書(shū)詳情

The Am29520A and Am29521A are high「 speed dual stack,

register fies that difler only in the way data is loaded (see

Table 1)- Both devices contain four 8-bit wide registers

whose texible architecture lends itseif to virtually any

System, The high output drive allows layout of the devices

directy on the system bus for bit sfce and array or digital

signal processing applications.

In the Am29520A,data may be _microprogrammed to

cascade through the 4 registers in push-down pattem, no-

op to hold data in the registers or push-down data through

one 2 level stack while holding data in the other stack-

The Am29521A also has the cascadable 4 register push-

down and no-op features.it can also be microprogrammed

to write over the ffst level register of one stack, while

holding data in the other 3 registers.

產(chǎn)品屬性

  • 型號(hào):

    AM29520ADCB

  • 功能描述:

    Pipeline Register

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