AM29LV116BT-120EIB中文資料超威半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The Am29LV116B is a 16 Mbit, 3.0 Volt-only Flash memory organized as 2,097,152 bytes. The device is offered in a 40-pin TSOP package. The byte-wide (x8) data appears on DQ7–DQ0. All read, program, and erase operations are accomplished using only a single power supply. The device can also be programmed in standard EPROM programmers.

DISTINCTIVE CHARACTERISTICS

■ Single power supply operation

— Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications

— Regulated voltage range: 3.0 to 3.6 volt read and write operations and for compatibility with high performance 3.3 volt microprocessors

■ Manufactured on 0.35 μm process technology

■ High performance

— Full voltage range: access times as fast as 90 ns

— Regulated voltage range: access times as fast as 80 ns

■ Ultra low power consumption (typical values at 5 MHz)

— 200 nA Automatic Sleep mode current

— 200 nA standby mode current

— 9 mA read current

— 15 mA program/erase current

■ Flexible sector architecture

— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and thirty-one 64 Kbyte sectors

— Supports full chip erase

— Sector Protection features:

A hardware method of locking a sector to prevent any program or erase operations within that sector Sectors can be locked in-system or via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors

■ Unlock Bypass Program Command

— Reduces overall programming time when issuing multiple program command sequences

■ Top or bottom boot block configurations available

■ Embedded Algorithms

— Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors

— Embedded Program algorithm automatically writes and verifies data at specified addresses

■ Minimum 1,000,000 write cycle guarantee per sector

■ Package option

— 40-pin TSOP

■ CFI (Common Flash Interface) compliant

— Provides device-specific information to the system, allowing host software to easily reconfigure for different Flash devices

■ Compatibility with JEDEC standards

— Pinout and software compatible with single power supply Flash

— Superior inadvertent write protection

■ Data# Polling and toggle bits

— Provides a software method of detecting program or erase operation completion

■ Ready/Busy# pin (RY/BY#)

— Provides a hardware method of detecting program or erase cycle completion

■ Erase Suspend/Erase Resume

— Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation

■ Hardware reset pin (RESET#)

— Hardware method to reset the device to reading array data