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AM29SL800CT150EIB中文資料超威半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

AM29SL800CT150EIB
廠商型號

AM29SL800CT150EIB

功能描述

8 Megabit (1 M x 8-Bit/512 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory

文件大小

549.02 Kbytes

頁面數(shù)量

41

生產(chǎn)廠商 Advanced Micro Devices
企業(yè)簡稱

AMD超威半導(dǎo)體

中文名稱

美國超威半導(dǎo)體公司官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-3 22:58:00

AM29SL800CT150EIB規(guī)格書詳情

GENERAL DESCRIPTION

The Am29SL800C is an 8 Mbit, 1.8 V volt-only Flash memory organized as 1,048,576 bytes or 524,288 words. The device is offered in 48-pin TSOP and 48-ball FBGA packages. The word-wide data (x16) appears on DQ15–DQ0; the byte-wide (x8) data appears on DQ7–DQ0. This device is designed to be programmed and erased in-system with a single 1.8 volt VCC supply. No VPP is for write or erase operations. The device can also be programmed in standard EPROM programmers.

DISTINCTIVE CHARACTERISTICS

■ Single power supply operation

— 1.8 to 2.2 V for read, program, and erase operations

— Ideal for battery-powered applications

■ Manufactured on 0.32 μm process technology

— Compatible with 0.35 μm Am29SL800B device

■ High performance

— Access times as fast as 100 ns

■ Ultra low power consumption (typical values at 5 MHz)

— 65 nA Automatic Sleep Mode current

— 65 nA standby mode current

— 5 mA read current

— 10 mA program/erase current

■ Flexible sector architecture

— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen 64 Kbyte sectors (byte mode)

— One 8 Kword, two 4 Kword, one 16 Kword, and fifteen 32 Kword sectors (word mode)

— Supports full chip erase

— Sector Protection features:

A hardware method of locking a sector to prevent any program or erase operations within that sector

Sectors can be locked in-system or via programming equipment

Temporary Sector Unprotect feature allows code changes in previously locked sectors

■ Unlock Bypass Program Command

— Reduces overall programming time when issuing multiple program command sequences

■ Top or bottom boot block configurations available

■ Embedded Algorithms

— Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors

— Embedded Program algorithm automatically writes and verifies data at specified addresses

■ Minimum 1,000,000 write cycle guarantee per sector

■ Package option

— 48-pin TSOP

— 48-ball FBGA

■ Compatibility with JEDEC standards

— Pinout and software compatible with singlepower supply Flash

— Superior inadvertent write protection

■ Data# Polling and toggle bits

— Provides a software method of detecting program or erase operation completion

■ Ready/Busy# pin (RY/BY#)

— Provides a hardware method of detecting program or erase cycle completion

■ Erase Suspend/Erase Resume

— Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation

■ Hardware reset pin (RESET#)

— Hardware method to reset the device to reading array data

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