AM79C971VCW中文資料超威半導體數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The Am79C971 controller is a single-chip 32-bit full-duplex, 10/100-Megabit per second (Mbps) highly integrated Ethernet system solution, designed to address high-performance system application requirements. It is a flexible bus mastering device that can be used in any application, including network-ready PCs and bridge/router designs. The bus master architecture provides high data throughput in the system and low CPU and system bus utilization. The Am79C971 controller is fabricated with AMD’s advanced low-power Complementary Metal Oxide Semiconductor (CMOS) process to provide low operating and standby current for power sensitive applications.

DISTINCTIVE CHARACTERISTICS

■ Single-chip Fast Ethernet controller for the

Peripheral Component Interconnect (PCI) local

bus

— 32-bit glueless PCI host interface

— Supports PCI clock frequency from DC to

33 MHz independent of network clock

— Supports network operation with PCI clock

from 15 MHz to 33 MHz

— High performance bus mastering

architecture with integrated Direct Memory

Access (DMA) Buffer Management Unit for

low CPU and bus utilization

— PCI specification revision 2.1 compliant

— Supports PCI Subsystem/Subvendor ID/

Vendor ID programming through the

EEPROM interface

— Supports both PCI 5.0-V and 3.3-V signaling

environments

— Plug and Play compatible

— Supports an unlimited PCI burst length

— Big endian and little endian byte alignments

supported

■ Integrated 10BASE-T and 10BASE-2/5 (AUI)

Physical Layer Interface

— Single-chip IEEE/ANSI 802.3, IEC/ISO 8802-3

and Blue Book Ethernet-compliant solution

— Automatic Twisted-Pair receive polarity

detection and correction

— Internal 10BASE-T transceiver with Smart

Squelch to Twisted-Pair medium

— IEEE 802.3-compliant auto-negotiable

10BASE-T interface

■ Supports General Purpose Serial Interface (GPSI)

■ Media Independent Interface (MII) for

connecting external 10- or 100-Megabit per

second (Mbps) transceivers

— IEEE 802.3-compliant MII

— Intelligent Auto-Poll? external PHY status

monitor and interrupt

— Includes intelligent on-chip Network Port

Manager that provides auto-port selection

between MII, on-chip 10BASE-T port, and AUI

without software support

— Supports both auto-negotiable and non

auto-negotiable external PHYs

— Supports 10BASE-T, 100BASE-TX/FX,

100BASE-T4, and 100BASE-T2 IEEE 802.3-

compliant MII PHYs at full- or half-duplex (Continue ...)