AM79C983A中文資料超威半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The Am79C983A Integrated Multiport Repeater 2 (IMR2) chip is a VLSI integrated circuit that provides a system-level solution to designing intelligent (managed) multiport repeaters. When the IMR2 device is combined with the Quad Integrated Ethernet Transceiver (QuIET) device, it provides a cost-effective solution to designing 10BASE-T managed repeaters. The IMR2 device integrates the repeater functions specified by Section 9 (Repeater Unit) and Section19 (Layer Management for 10 Mb/s Baseband Repeaters) of the IEEE 802.3 standard.

DISTINCTIVE CHARACTERISTICS

■ Repeater functionality compliant with IEEE 802.3 Repeater Unit specifications

■ Hardware implementation of Management Information Base (MIB) with all of the counters, attributes, actions, and notifications specified by IEEE 802.3 Section 19 (Layer Management)

■ Twelve pseudo AUI (PAUI?) ports to support multiple media types via direct connection to external transceivers

■ One IEEE-compliant AUI port

■ One reversible AUI (RAUI?) port that can be programmed as a second AUI port or used to connect directly to a media access controller (MAC)

■ Direct interface with the AMD Am79C988A QuIET? (Quad Integrated Ethernet Transceiver) to support 10BASE-T repeater designs

■ Port switching support to allow individual ports to be switched between multiple Ethernet backplanes under software control

■ Remote Monitoring (RMON) Register Bank to provide direct support for etherStatsEntry and etherStatsHistory object groups of the RMON MIB (IETF RFC1757)

■ Packet Report Port to provide packet information for deriving objects in the Host, HostTopN, and Matrix groups of the RMON MIB (IETF RFC1578)

■ Two user-selectable expansion bus modes: IMR/IMR+ compatible mode and asynchronous mode

■ Simple 8-bit microprocessor interface

■ Full LED support

■ 132-pin PQFP CMOS device with a single 5-V supply