APU428中文資料APLUS數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

General Description

APU428 is an embedded high-performance 4-bit microcomputer with an LCD/LED driver. It contains all the necessary functions in a single chip: 4-bit parallel processing ALU, ROM, RAM, I/O ports, timer, clock generator, dual clock, ADC, RFC, alarm, EL-light, LCD driver, look-up table and watchdog timer. The instruction set consists of 148 instructions which include nibble operation, manipulation, various conditional branch instructions and LCD data transfer instructions which are powerful and easy to follow.

The HALT function stops any internal operations other than the oscillator, divider and LCD driver in order to minimize the power dissipation.

The stop function stops all clocks in the chip.

Features

? Low power dissipation

? Powerful instruction set (148 instructions)

- Binary addition, subtraction, BCD adjustment, logical operation in direct addressing mode and index

- addressing mode

- Single-bit manipulation (set, reset, decision for branch)

- Various conditional branches

- 16 working registers and manipulation

- LCD driver data transfer

- Look-up table

- Programmable option

- System clock selection

? Memory capacity

- Instruction ROM capacity 2048 x 16 bits

- Index ROM capacity 256 x 8 bits

- Internal RAM capacity 256 x 4 bits

(low-address 128 nibbles can be accessed by direct addressing, full-range 256 nibbles can be accessed by index addressing)

? Input/output ports

- Port IOA 4 pins (with internal pull-low, chattering clock, MUX with CX, RR, RT, RH/ SEG 37~40 by mask option)

- Port IOB 4 pins (MUX with ELC, ELP, BZB, BZ/SEG41, 42 by mask option)

- Port IOC 4 pins (with internal pull-low, low-level hold, chattering clock, MUX option with AN1~4 by mask option)

- Port IOD 4 pins (MUX with PWM1, 2/SEG33~36 by mask option)

? 8-level subroutine nesting

? Interrupt function

- External factor 2 (INT pin & port IOA, IOC input)

- Internal factor 4 (predivider, 2 timers & RFC)

? Built-in EL-light driver, alarm, frequency or melody generator (MUX with IOB/ SEG41, 42)

? Built-in R to F converter circuit (MUX with IOA/SEG37~40)

? Built-in comparator, 6/8-bit PWM output, 4-bit D/A converter, low-battery detector; this structure can be used as a 4/6/8-bit full range ADC

- Port PWM 2 pins (MUX with SEG35, 36)

- Port ADC 4 pins (MUX with IOC)

? 2 6-bit programmable timers with programmable clock source

? Watchdog timer

? LCD/LED driver output

- 42 LCD/LED driver outputs (up to 168 LCD segments are drivable)

- Mask option is used to select static, 1/2 bias 1/2 duty, 1/2 bias 1/3 duty, 1/2 bias 1/4 duty, 1/3 bias 1/3 duty and 1/3 bias 1/4 duty drive modes of the LCD panel

- Mask option is used to select DC output, and static, 1/2 duty, 1/3 duty and 1/4 duty drive modes of the LED panel

- Mask option is used to select SEG28~32 as P open-drain DC outputs

- Single instruction stops all segments that are either in LCD or LED

? Built-in voltage doubler, halver, tripler charge pump circuit

? Dual clock operation

? HALT function

? Stop function