AS28F128J3MPBG-15/XT中文資料AUSTIN數(shù)據(jù)手冊PDF規(guī)格書

Plastic Encapsulated Microcircuit 128Mb, x8 and x16 Q-FLASH Memory

Even Sectored, Single Bit per Cell Architecture

General Description

ASI’s, AS28F128J3M Enhanced or Mil-Temp variant of Micron’s Q-Flash family of devices, is a nonvolatile, electrically block erasable (FLASH), programmable memory device manufactured using Micron’s 0.15um process technology. This device containing 134,217,728 bits organized as either 16,777,218 (x8) or 8,388,608 bytes (x16). The device is uniformly sectored with one hundred and twenty eight 128KB ERASE blocks.

Features

? 100 Pin and Function compatible to Intel’s MLC Family

? NOR Cell Architecture

? 2.7V to 3.6V VCC

? 2.7V to 3.6V or 5V VPEN (Programming Voltage)

? Asynchronous Page Mode Reads

? Manufacturer’s ID Code:

! MT28F128J3MRG Micron 0x2Ch

? Industry Standard Pin-Out

? Fully compatible TTL Input and Outputs

? Common Flash Interface [CFI]

? Scalable Command Set

? Automatic WRITE and ERASE Algorithms

? 5.6us per Byte effective programming time

? 128 bit protection register

! 64-bit unique device identifier

! 64-bit user programmable OTP cells

? Enhanced data protection feature with use of VPEN=VSS

? Security OTP block feature

? 100,000 ERASE cycles per BLOCK

? Automatic Suspend Options:

! Block ERASE SUSPEND-to-READ

! Block ERASE SUSPEND-to-PROGRAM

! PROGRAM SUSPEND-to-READ

? Available Operating Ranges:

! Enhanced [-ET] -40oC to +105oC

! Mil-Temperature [-XT] -55oC to +125oC