AS7C31026-12BC中文資料ALSC數(shù)據(jù)手冊(cè)PDF規(guī)格書

Functional description

The AS7C1026 and AS7C31026 are high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) devices organized as 65,536 words x 16 bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.

Features

? AS7C1026 (5V version)

? AS7C31026 (3.3V version)

? Industrial and commercial versions

? Organization: 65,536 words x 16 bits

? Center power and ground pins for low noise

? High speed

- 12/15/20 ns address access time

- 6,7,8 ns output enable access time

? Low power consumption: ACTIVE

- 880 mW (AS7C1026) / max @ 12 ns

- 396 mW (AS7C31026) / max @ 12 ns

? Low power consumption: STANDBY

- 28 mW (AS7C1026) / max CMOS I/O

- 18 mW (AS7C31026) / max CMOS I/O

? 2.0V data retention

? Easy memory expansion with CE, OE inputs

? TTL-compatible, three-state I/O

? JEDEC standard packaging

- 44-pin 400 mil SOJ

- 44-pin 400 mil TSOP II

- 48-ball 6 mm × 8 mm CSP mBGA

? ESD protection ≥ 2000 volts

? Latch-up current ≥ 200 mA