首頁>AS7C33128NTD36B-200TQC>規(guī)格書詳情
AS7C33128NTD36B-200TQC中文資料ALSC數(shù)據(jù)手冊PDF規(guī)格書
相關芯片規(guī)格書
更多- AS7C33128NTD32B
- AS7C33128NTD32B-166TQC
- AS7C33128NTD32B-166TQCN
- AS7C33128NTD18B-200TQIN
- AS7C33128NTD32B-133TQIN
- AS7C33128NTD32B-200TQC
- AS7C33128NTD18B-200TQCN
- AS7C33128NTD32B-166TQI
- AS7C33128NTD32B-133TQC
- AS7C33128NTD36B-133TQC
- AS7C33128NTD32B-200TQIN
- AS7C33128NTD36B-166TQCN
- AS7C33128NTD36B-166TQI
- AS7C33128NTD32B-200TQCN
- AS7C33128NTD18B-200TQC
- AS7C33128NTD36B-133TQI
- AS7C33128NTD32B-166TQIN
- AS7C33128NTD36B-133TQCN
AS7C33128NTD36B-200TQC規(guī)格書詳情
Functional description
The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.
Features
? Organization: 131,072 words × 32 or 36 bits
? Fast clock speeds to 200 MHz
? Fast clock to data access: 3.0/3.5/4.0 ns
? Fast OE access time: 3.0/3.5/4.0 ns
? Fully synchronous register-to-register operation
? Single-cycle deselect
? Asynchronous output enable control
? Available in 100-pin TQFP package
? Individual byte write and global write
? Multiple chip enables for easy expansion
? 3.3V core power supply
? 2.5V or 3.3V I/O operation with separate VDDQ
? Linear or interleaved burst control
? Snooze mode for reduced power-standby
? Common data inputs and data outputs
產(chǎn)品屬性
- 型號：
AS7C33128NTD36B-200TQC
- 制造商：
ALSC
- 制造商全稱：
Alliance Semiconductor Corporation
- 功能描述：
3.3V 128Kx32/36 Pipelined SRAM with NTD
