首頁>AS7C33256NTF18B-80TQCN>規(guī)格書詳情
AS7C33256NTF18B-80TQCN中文資料ALSC數(shù)據(jù)手冊PDF規(guī)格書
相關(guān)芯片規(guī)格書
更多- AS7C33256NTF18B-80TQC
- AS7C33256NTF18B-75TQIN
- AS7C33256NTF18B-75TQI
- AS7C33256NTF18B-75TQCN
- AS7C33256NTF18B-75TQC
- AS7C33256NTF18B-10TQIN
- AS7C33256NTF18B-10TQI
- AS7C33256NTF18B-10TQCN
- AS7C33256NTF18B-10TQC
- AS7C33256NTF18B
- AS7C33256NTD36A-166TQIN
- AS7C33256NTD36A-166TQI
- AS7C33256NTD36A-166TQCN
- AS7C33256NTD36A-166TQC
- AS7C33256NTD36A-133TQIN
- AS7C33256NTD36A-133TQI
- AS7C33256NTD36A-133TQCN
- AS7C33256NTD36A-133TQC
AS7C33256NTF18B-80TQCN規(guī)格書詳情
Functional description
The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.
Features
? Organization: 131,072 words × 32 or 36 bits
? Fast clock speeds to 200 MHz
? Fast clock to data access: 3.0/3.5/4.0 ns
? Fast OE access time: 3.0/3.5/4.0 ns
? Fully synchronous register-to-register operation
? Single-cycle deselect
? Asynchronous output enable control
? Available in 100-pin TQFP package
? Individual byte write and global write
? Multiple chip enables for easy expansion
? 3.3V core power supply
? 2.5V or 3.3V I/O operation with separate VDDQ
? Linear or interleaved burst control
? Snooze mode for reduced power-standby
? Common data inputs and data outputs
產(chǎn)品屬性
- 型號:
AS7C33256NTF18B-80TQCN
- 制造商:
ALSC
- 制造商全稱:
Alliance Semiconductor Corporation
- 功能描述:
3.3V 256K x 18 Flowthrough Synchronous SRAM with NTD