AS7C34098A-20TIN集成電路（IC）的存儲(chǔ)器規(guī)格書PDF中文資料

Functional description

The AS7C34098A is a high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) device organized as 262,144 words × 16 bits. It is designed for memory applications where fast data access, low power, and simple interfacing are desired.

Equal address access and cycle times (tAA, tRC, tWC) of 10/12/15/20 ns with output enable access times (tOE) of 4/5/6/7 ns are ideal for high-performance applications. The chip enable input CE permits easy memory expansion with multiple-bank memory systems.

Features

? Pin compatible with AS7C34098

? Industrial and commercial temperature

? Organization: 262,144 words × 16 bits

? Center power and ground pins

? High speed

- 10/12/15/20 ns address access time

- 4/5/6/7 ns output enable access time

? Low power consumption: ACTIVE

- 650 mW /max @ 10 ns

? Low power consumption: STANDBY

- 28.8 mW /max CMOS

? Individual byte read/write controls

? Easy memory expansion with CE, OE inputs

? TTL- and CMOS-compatible, three-state I/O

? 44-pin JEDEC standard packages

- 400-mil SOJ

- TSOP 2

? ESD protection ≥ 2000 volts

? Latch-up current ≥ 200 mA