AS7C513B-20TI中文資料ALSC數(shù)據(jù)手冊PDF規(guī)格書

Functional description

The AS7C513B is a high performance CMOS 524,288-bit Static Random Access Memory (SRAM) device organized as 32,768 words × 16 bits. They are designed for memory applications where fast data access, low power, and simple interfacing are desired.

Features

? Industrial and commercial temperature

? Organization: 32,768 words × 16 bits

? Center power and ground pins

? High speed

? 10/12/15/20 ns address access time

? 5, 6, 7, 8 ns output enable access time

? Low power consumption: ACTIVE

? 605mW / max @ 10 ns

? Low power consumption: STANDBY

? 55 mW / max CMOS I/O

? 6T 0.18u CMOS Technology

? Easy memory expansion with CE, OE inputs

? TTL-compatible, three-state I/O

? 44-pin JEDEC standard package

? 400 mil SOJ

? 400 mil TSOP 2

? ESD protection ≥ 2000 volts

? Latch-up current ≥ 200 mA