AT17LV002-10CC中文資料愛特梅爾數據手冊PDF規(guī)格書

Description

The AT17C65/128/256 and AT17LV65/128/256 (low-density AT17 Series) FPGA Configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration memory for Field Programmable Gate Arrays. The low-density AT17 Series is packaged in the 8-pin PDIP, 8-lead SOIC, and the popular 20-lead PLCC and SOIC. The AT17 Series family uses a simple serial-access procedure to configure one or more FPGA devices. The AT17 Series organization supplies enough memory to configure one or multiple smaller FPGAs. Using a feature of the AT17 Series, the user can select the polarity of the reset function by programming a special EEPROM byte. These devices also support a write-protection mechanism within its programming mode.

The AT17 Series Configurators can be programmed with industry-standard programmers, or Atmel’s ATDH2200E Programming Kit.

Features

? EE Programmable 65,536 x 1-, 131,072 x 1-, and 262,144 x 1-bit Serial Memories

Designed to Store Configuration Programs for Field Programmable Gate

Arrays (FPGAs)

? In-System Programmable via 2-wire Bus

? Simple Interface to SRAM FPGAs

? Compatible with Atmel AT6000, AT40K FPGAs, Altera FLEX? Devices, Lucent ORCA?

FPGAs, Xilinx XC3000, XC4000, XC5200, SPARTAN? FPGAs, Motorola MPA1000 FPGAs

? Cascadable Read Back to Support Additional Configurations or Future Higher-density

Arrays (128K and 256K only)

? Low-power CMOS EEPROM Process

? Programmable Reset Polarity

? Available in the Space-efficient Plastic DIP or SOIC Packages; PLCC Package is

Pin-compatible Across Product Family

? Emulation of Atmel’s AT24CXXX Serial EEPROMs

? Available in 3.3V ± 10 LV and 5V ± 5 C Versions

? Low-power Standby Mode