AT25FS040集成電路（IC）的存儲器規(guī)格書PDF中文資料

Description

The AT25FS040 provides 4,194,304 bits of serial reprogrammable Flash memory organized as 524,288 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT25FS040 is available in a space-saving 8-lead JEDEC SOIC and 8-lead Ultra Thin SAP packages.

Features

? Serial Peripheral Interface (SPI) Compatible

? Supports SPI Modes 0 (0,0) and 3 (1,1)

– Datasheet describes Mode 0 Operation

? 50 MHz Clock Rate

? Byte Mode and Page Mode Program (1 to 256 Bytes) Operations

? Sector/Block/Page Architecture

– Sixteen 256 byte Pages per Sector

– Sixteen 4 Kbyte Sectors per Block

– Eight uniform 64 Kbyte Blocks

? Self-timed Sector, Block and Chip Erase

? Product Identification Mode with JEDEC Standard

? Low-voltage Operation

– 2.7V (VCC = 2.7V to 3.6V)

? Hardware and Software Write Protection

– Device protection with Write Protect (WP) Pin

– Write Enable and Write Disable Instructions

– Software Write Protection:

? Upper 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 or Entire Array

? Flexible Op Codes for Maximum Compatibility

? Self-timed Program Cycle

– 30 μs/Byte Typical

? Single Cycle Reprogramming (Erase and Program) for Status Register

? High Reliability

– Endurance: 10,000 Write Cycles Typical

? 8-lead JEDEC 150mil SOIC and 8-lead Ultra Thin Small Array Package (SAP)

? Die Sales: Waffer Form, Tape and Reel, and Bumped Wafers