AT27LV520-90SI集成電路（IC）的存儲器規(guī)格書PDF中文資料

Description

The AT27LV520 is a low-power, high-performance, 524,288-bit one-time programmable read-only memory (OTP EPROM) organized 64K by eight bits. It incorporates latches for the eight lower order address bits to multiplex with the eight data bits. This minimizes system chip count, reduces cost, and simplifies the design of multiplexed bus systems. It requires only one power supply in the range of 3.0V to 3.6V for normal read mode operation, making it ideal for fast, portable systems using battery power. Any byte can be accessed in less than 70 ns.

Features

? 8-bit Multiplexed Addresses/Outputs

? Fast Read Access Time – 70 ns

? Dual Voltage Range Operation

– Low-voltage Power Supply Range, 3.0V to 3.6V, or

– Standard 5V ± 10 Supply Range

? Pin Compatible with Standard AT27C520

? Low-power CMOS Operation

– 20 μA max. Standby for ALE = VIH and VCC = 3.6V

– 29 mW max. Active at 5 MHz for VCC = 3.6V

? JEDEC Standard Packages

– 20-lead TSSOP

– 20-lead SOIC

? High-reliability CMOS Technology

– 2,000V ESD Protection

– 200 mA Latch-up Immunity

? Rapid? Programming Algorithm – 50 μs/Byte (Typical)

? CMOS- and TTL-compatible Inputs and Outputs

– JEDEC Standard for LVTTL

? Integrated Product Identification Code

? Commercial and Industrial Temperature Range