AT90S1200集成電路（IC）的微控制器規(guī)格書PDF中文資料

Features

? Utilizes the AVR? RISC Architecture

? AVR – High-performance and Low-power RISC Architecture

– 89 Powerful Instructions – Most Single Clock Cycle Execution

– 32 x 8 General Purpose Working Registers

– Up to 12 MIPS Throughput at 12 MHz

? Data and Non-volatile Program Memory

– 1K Byte of In-System Programmable Flash

Endurance: 1,000 Write/Erase Cycles

– 64 Bytes of In-System Programmable EEPROM

Endurance: 100,000 Write/Erase Cycles

– Programming Lock for Flash Program and EEPROM Data Security

? Peripheral Features

– One 8-bit Timer/Counter with Separate Prescaler

– On-chip Analog Comparator

– Programmable Watchdog Timer with On-chip Oscillator

– SPI Serial Interface for In-System Programming

? Special Microcontroller Features

– Low-power Idle and Power-down Modes

– External and Internal Interrupt Sources

– Selectable On-chip RC Oscillator for Zero External Components

? Specifications

– Low-power, High-speed CMOS Process Technology

– Fully Static Operation

? Power Consumption at 4 MHz, 3V, 25°C

– Active: 2.0 mA

– Idle Mode: 0.4 mA

– Power-down Mode: <1 μA

? I/O and Packages

– 15 Programmable I/O Lines

– 20-pin PDIP, SOIC and SSOP

? Operating Voltages

– 2.7 - 6.0V (AT90S1200-4)

– 4.0 - 6.0V (AT90S1200-12)

? Speed Grades

– 0 - 4 MHz, (AT90S1200-4)

– 0 - 12 MHz, (AT90S1200-12)