AT93C46C-10SI-2.5集成電路（IC）的存儲器規(guī)格書PDF中文資料

Description

The AT93C46C provides 1024 bits of serial electrically-erasable programmable read only memory (EEPROM) organized as 64 words of 16 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT93C46C is available in space saving 8-pin PDIP and 8-pin JEDEC packages.

The AT93C46C is enabled through the Chip Select pin (CS), and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a READ instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO. The WRITE cycle is completely self timed and no separate ERASE cycle is required before WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. When CS is brought “high” following the initiation of a WRITE cycle, the DO pin outputs the READY/BUSY status of the part.

The AT93C46C is available in 4.5V to 5.5V, 2.7V to 5.5V, and 2.5V to 5.5V versions.

Features

? Low-Voltage and Standard-Voltage Operation

– 5.0 (VCC = 4.5V to 5.5V)

– 2.7 (VCC = 2.7V to 5.5V)

– 2.5 (VCC = 2.5V to 5.5V)

? 3-Wire Serial Interface

? Schmitt Trigger, Filtered Inputs for Noise Suppression

? 2 MHz Clock Rate (5V) Compatibility

? Self-Timed Write Cycle (10 ms max)

? High Reliability

– Endurance: 1 Million Write Cycles

– Data Retention: 100 Years

– ESD Protection: > 4000V

? Automotive Grade and Extended Temperature Devices Available

? 8-Pin PDIP and JEDEC SOIC Packages