ATF1504ASVL-20AU100集成電路（IC）的CPLD（復(fù)雜可編程邏輯器件）規(guī)格書(shū)PDF中文資料

ATF1504ASVL-20AU100屬于集成電路（IC）的CPLD（復(fù)雜可編程邏輯器件）。由微芯科技股份有限公司制造生產(chǎn)的ATF1504ASVL-20AU100CPLD（復(fù)雜可編程邏輯器件）CPLD 是用于執(zhí)行邏輯運(yùn)算和信息處理的用戶可配置集成電路產(chǎn)品；與 PLD 或 PAL 器件相比，這些器件具有更高級(jí)別的功能（即更多的邏輯門(mén)），但低于 FPGA。CPLD 通常包含非易失性配置存儲(chǔ)器，支持直接在器件上存儲(chǔ)和保留用戶所需的配置，并在器件斷電時(shí)仍可保留這些信息。

Features

? High-Density, High-Performance, Electrically-

Erasable Complex Programmable Logic

Device:

- 3.0V to 3.6V operating range

- 64 macrocells

- 5 product terms per macrocell, expandable

up to 40 per macrocell

- 44 and 100 pins

- 15 ns maximum pin-to-pin delay

- Registered operation up to 77 MHz

- Enhanced routing resources

? In-System Programmability (ISP) via JTAG

? Flexible Logic Macrocell:

- D/T/Latch configurable flip-flops

- Global and individual register control signals

- Global and individual output enable

- Programmable output slew rate

- Programmable output open-collector option

- Maximum logic utilization by burying a register

with a COM output

? Advanced Power Management Features:

- Automatic 5 μA Standby (ATF1504ASVL)

- Pin-controlled 100 μA Standby mode (typical)

- Programmable pin-keeper circuits on inputs

and I/Os

- Reduced-power feature per macrocell

? Available in Industrial Temperature Range

? Robust EEPROM Technology:

- 100 tested

- Completely reprogrammable

- 10,000 Program/Erase cycles

- 20-year data retention

- 2000V ESD protection

- 200 mA latch-up immunity

? JTAG Boundary-Scan Testing to IEEE Std.

1149.1-1990 and 1149.1a-1993 Supported

? PCI-Compliant

? Security Fuse Feature

? Green (Pb/Halide-Free/RoHS Compliant)

Package Options