AU1250中文資料ETC數(shù)據(jù)手冊(cè)PDF規(guī)格書

Primary Features

Customized MIPS32? Core

? 333, 400, 500, 600 and 700MHz

? 32-bit architecture

? 16KB instruct + 16KB data caches

? High-speed multiply-accumulate (MAC) and divide unit

? 1.2V core, 3.3V I/O

Media Acceleration Engine (MAE)

? Support for MPEG1, 2, 4, and WMV9 scaled up to 1024x768

? MPEG2 main profile/main level (720x480, 10Mbps, 30fps)

? MPEG4 advanced simple profile/level 5

(720x480, 4Mbps, 30fps)

? WMV9 main profile/medium level (720x480, 2.5Mbps, 30fps)

DDR SDRAM Controller

? Supports 2.5 or 1.8V DDR1/DDR2 and mobile DDR memory

with speeds up to DDR500

? 16/32-bit data, 14-bit address

? Up to 512MB (four 1-Gbit devices)

? 1:1, 2:1, 3:1 system bus clock to memory clock options

? Unified memory architecture with dedicated video subsystem

Static Bus Controller

? 16-bit data bus interface

? IDE interface with support for PIO mode and multiword simple

DMA data transfers

? Support for both NOR and NAND Flash devices

— Boot from NAND or NOR Flash, including Large Block

NAND Flash

— Supports 30 bits of addressable memory using 15 pins and

address latch protocol

? Compact Flash/PCMCIA

? Support for external 10/100 Ethernet controller