BCM4705中文資料博通公司數(shù)據(jù)手冊PDF規(guī)格書

FEATURES

? Advanced 500 DMIPS/300-MHz MIPS32? core

? 4-way set associative 32-KB I-Cache

? 2-way set associative 32-KB D-Cache

? 4-KB Read-Ahead Cache

? MMU/TLB support for Linux?

? Advanced Gigabit Ethernet MAC

? Hardware TCP segmentation and Checksum offload

? GMII, RGMII, and MII PHY connectivity

? Two USB2.0 High-speed host ports

? One USB2.0 High-speed device port

? DDR SDRAM controller

? 16/32-bit DDR266 and 133-MHz SDRAM support

? 8 MB to 512 MB capacity

? Support for 8/16/32-bit wide memory devices

? PCI 2.3 Host interface (32 bit/33–37 MHz)

? Supports four PCI bus masters

? Optional 5V-tolerant operation (PCI 2.2 support)

? Advanced GPIO interface

? All GPI supports interrupt triggering capability

? Dual RS232 UART

? 2.4W Low-power design