C9500-32C中文資料思科數(shù)據(jù)手冊(cè)PDF規(guī)格書

Cisco Catalyst 9500X models

● The Cisco Silicon One Q200 Application-Specific Integrated Circuit (ASIC) is purpose built for the next generation network core + edge switch. It is the first enterprise ASIC to offer speeds up to 12.8 Tbps full duplex with 8 Bpps of forwarding performance, while supporting high-performance and full routing and switching capabilities without external memories.

● The Cisco Silicon One Q200 ASIC is built on 7nm fabrication technology, capable of high performance while maintaining a low power footprint.

● Up to 12.0 Tbps switching capacity with 8 Bpps forwarding rate.

● 80MB of dedicated low-latency buffer, with up to 8GB of HBM buffer for deep packet buffers.

● Up to 28 native nonblocking 40/100 Gigabit Ethernet QSFP28 ports.

● Up to 60 native nonblocking 10/25/50 Gigabit Ethernet SFP56 ports.

● Up to 8 native nonblocking 40/100/200/400 Gigabit Ethernet QSFPDD ports.

● Intel 2.43-GHz x86 CPU with 8 cores and 32-GB of DDR4 memory.

● Up to 960 GB of SSD local storage for container-based application hosting (2x 10G KR ports).

● Flexible routing (IPv4, IPv6, and multicast) tables, Layer 2 tables, ACL tables, and QoS tables.

● ASIC tables for switching scale up to 256K MAC addresses and routing scale up to 2M routes.

● Dual-stack IPv4/IPv6 and dynamic hardware forwarding table allocations, for ease of IPv4-to-IPv6 migration.

● Hardware support for Application Hosting.