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CAT28F512LA90中文資料安森美半導(dǎo)體數(shù)據(jù)手冊PDF規(guī)格書

CAT28F512LA90
廠商型號(hào)

CAT28F512LA90

功能描述

512K-Bit CMOS Flash Memory

文件大小

107.82 Kbytes

頁面數(shù)量

16

生產(chǎn)廠商 ON Semiconductor
企業(yè)簡稱

ONSEMI安森美半導(dǎo)體

中文名稱

安森美半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-9 14:53:00

CAT28F512LA90規(guī)格書詳情

DESCRIPTION

The CAT28F512 is a high speed 64K x 8-bit electrically erasable and reprogrammable Flash memory ideally suited for applications requiring in-system or after-sale code updates. Electrical erasure of the full memory contents is achieved typically within 0.5 second.

It is pin and Read timing compatible with standard EPROM and EEPROM devices. Programming and Erase are performed through an operation and verify algorithm. The instructions are input via the I/O bus, using a

two write cycle scheme. Address and Data are latched to free the I/O bus and address bus during the write operation.

The CAT28F512 is manufactured using Catalyst’s advanced CMOS floating gate technology. It is designed to endure 100,000 program/erase cycles and has a data retention of 10 years. The device is available in JEDEC approved 32-pin plastic DIP, 32-pin PLCC or 32-pin TSOP packages.

FEATURES

■ Fast Read Access Time: 90/120/150 ns

■ Low Power CMOS Dissipation:

–Active: 30 mA max (CMOS/TTL levels)

–Standby: 1 mA max (TTL levels)

–Standby: 100 μA max (CMOS levels)

■ High Speed Programming:

–10 μs per byte

–1 Sec Typ Chip Program

■ 12.0V ± 5 Programming and Erase Voltage

■ Electronic Signature

■ Commercial, Industrial and Automotive Temperature Ranges

■ Stop Timer for Program/Erase

■ On-Chip Address and Data Latches

■ JEDEC Standard Pinouts:

–32-pin DIP

–32-pin PLCC

–32-pin TSOP ( 8 x 20)

■ 100,000 Program/Erase Cycles

■ 10 Year Data Retention

■ Green Package Options Available

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
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