CD40108BMS中文資料Intersil數(shù)據(jù)手冊(cè)PDF規(guī)格書

Description

The CD40108BMS is a 4 x 4 multiport register containing four 4-bit registers, write address decoder, two separate read address decoders, and two 3-state output buses.

When the ENABLE input is low, the corresponding output bus is switched, independently of the clock, to a high-impedance state. The high-impedance third state provides the outputs with the capability of being connected to the bus lines in a bus-organized system without the need for interface or pull-up components.

Features

? High Voltage Type (20V Rating)

? Four 4-Bit Registers

? One Input and Two Output Buses

? Unlimited Expansion in Bit and Word Directions

? Data Lines have latched Inputs

? 3-State Outputs

? Separate Control of Each Bus, Allowing Simultaneous Independent Reading of Any of Four Registers on Bus A and Bus B and Independent Writing Into Any of the Four Registers

? CD40108BMS is Pin-Compatible with Industry Type MC14580

? Standardized Symmetrical Output Characteristics

? 100 Tested for Quiescent Current at 20V

? Maximum Input Current of 1μA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC

? Noise Margin (Over Full Package/Temperature Range)

?? - 1V at VDD = 5V

?? - 2V at VDD = 10V

?? - 2.5V at VDD = 15V

? 5V, 10V and 15V Parametric Ratings

? Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”

Applications

? Scratch-Pad Memories

? Arithmetic Units

? Data Storage

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