CD4021集成電路（IC）的移位寄存器規(guī)格書PDF中文資料

General Description

The CD4021BC is an 8-stage parallel input/serial output shift register. A parallel/serial control input enables individ ual JAM inputs to each of 8 stages. Q outputs are available from the sixth, seventh, and eighth stages. All outputs have equal source and sink current capabilities and conform to

standard “B” series output drive. When the parallel/serial control input is in the logical “0”

state, data is serially shifted into the register synchronously with the positive transition of the clock. When the parallel/serial control is in the logical “1” state, data is jammed into each stage of the register asynchronously with the clock.

All inputs are protected against static discharge with diodes to VDDand VSS.

Features

■Wide supply voltage range: 3.0V to 15V

■High noise immunity: 0.45 VDD(typ.)

■Low power TTL compatibility:

Fan out of 2 driving 74L or 1 driving 74LS

■5V–10V–15V parametric ratings

■Symmetrical output characteristics

■Maximum input leakage 1 μA at 15V over full temperature range