CD4095BMS中文資料Intersil數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
CD4095BMS規(guī)格書(shū)詳情
Description
CD4095BMS and CD4096BMS are J-K Master-Slave FlipFlops featuring separate AND gating of multiple J and K inputs. The gated J-K inputs control transfer of information into the master section during clocked operation. Information on the J-K inputs is transferred to the Q and Q outputs on the positive edge of the clock pulse. SET and RESET inputs (active high) are provided for asynchronous operation.
Features
? Set-Reset Capability
? High Voltage Types (20V Rating)
? CD4095BMS Non-Inverting J and K Inputs
? CD4096BMS Inverting and Non-Inverting J and K Inputs
? 16MHz Toggle Rate (Typ.) at VDD - VSS = 10V
? Gated Inputs
? 100 Tested for Quiescent Current at 20V
? 5V, 10V and 15V Parametric Ratings
? Standardized Symmetrical Output Characteristics
? Maximum Input Current of 1μA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
? Noise Margin (Over Full Package/Temperature Range)
??? - 1V at VDD = 5V
??? - 2V at VDD = 10V
??? - 2.5V at VDD = 15V
? Meets all requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”
Applications
? Registers
? Counters
? Control Circuits
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
RCA |
2020+ |
DIP14 |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開(kāi)13%增 |
詢價(jià) | ||
HARRIS(哈利斯) |
23+ |
6000 |
誠(chéng)信服務(wù)，絕對(duì)原裝原盤 |
詢價(jià) | |||
HAR |
23+ |
DIP14 |
3200 |
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷售! |
詢價(jià) | ||
HAR |
24+ |
53 |
詢價(jià) | ||||
RCA |
23+ |
DIP16 |
5000 |
原裝正品,假一罰十 |
詢價(jià) | ||
HARRIS/哈里斯 |
22+ |
CDIP-14 |
14008 |
原裝正品 |
詢價(jià) | ||
HARRIS |
9206 |
18 |
優(yōu)勢(shì)貨源原裝正品 |
詢價(jià) | |||
TI |
2023+ |
09+ |
8700 |
原裝現(xiàn)貨 |
詢價(jià) | ||
HAR |
2021+ |
DIP |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) | ||
RCA |
21+ |
35200 |
一級(jí)代理/放心采購(gòu) |
詢價(jià) |
