CD4724BMS中文資料Intersil數(shù)據(jù)手冊PDF規(guī)格書

Description

CD4724BMS 8-bit addressable latch is a serial-input, parallel-output storage register that can perform a variety of functions.

Features

? High Voltage Type (20V Rating)

? Serial Data Input

? Active Parallel Output

? Storage Register Capability

? Master Clear

? Can Function as Demultiplexer

? Standardized Symmetrical Output Characteristics

? 100 Tested for Quiescent Current at 20V

? Maximum Input Current of 1μA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC

? Noise Margin (Over Full Package/Temperature Range)

??? - 1V at VDD = 5V

??? - 2V at VDD = 10V

??? - 2.5V at VDD = 15V

? 5V, 10V and 15V Parametric Ratings

? Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices”

Applications

? Multi-line Decoders

? A/D Converters