CDB42426中文資料凌云邏輯數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

General Description

The CS42426 CODEC provides two analog-to-digital and six digital-to-analog Delta-Sigma converters, as well as an integrated PLL, in a 64-pin LQFP package. The CS42426 integrated PLL provides a low-jitter system

clock. The internal stereo ADC is capable of independent channel gain control for single-ended or differential analog inputs. All six channels of DAC provide digital volume control and differential analog outputs. The general purpose outputs may be driven high or low, or mapped to a variety of DAC mute controls or ADC overflow indicators.

Features

● Six 24-bit D/A, two 24-bit A/D converters

● 114 dB DAC / 114 dB ADC dynamic range

● -100 dB THD+N

● System sampling rates up to 192 kHz

● Integrated low-jitter PLL for increased system jitter tolerance

● PLL clock or OMCK system clock selection

● 7 configurable general purpose outputs

● ADC high pass filter for DC offset calibration

● Expandable ADC channels and one-line mode support

● Digital output volume control with soft ramp

● Digital +/-15 dB input gain adjust for ADC

● Differential analog architecture

● Supports logic levels between 5 V and 1.8 V