CH7101B中文資料Chrontel數(shù)據(jù)手冊PDF規(guī)格書

FEATURES

? HDMI Receiver compliant with HDMI 1.4 specification

? Analog RGB output for VGA with Triple 9-bit DAC up

to 200MHz pixel rate. Sync signals can be provided in

separated or composite manner. Support VESA and

CEA timing standards up to WUXGA 1920x1200@60

Hz with reduced blanking and 1920x1080@60Hz

? On-chip Audio encoder which support 2 channel IIS/

S/PDIF audio output

? VGA output is compliant with VESA VSIS v1r2

specification

? MCCS bypass support

? MCU embedded to handle the control logic

? Support device boot up by automatically loading

firmware from on-chip flash

? Integrated EDID Buffer

? Crystal Free architecture

? VGA connection detection supported

? HDMI input detection supported

? Support Auto Power Saving mode and low stand-by

current

? Support YCC to RGB conversion in ITU-R BT.601 and

709 color space

? IIC slave interface and HDMI DDC interface are

available for debug and firmware update.

? Low power architecture

? RoHS compliant and Halogen free package

? Offered in 40-Pin QFN package (5 x 5 mm)