CH7117B中文資料Chrontel數(shù)據(jù)手冊PDF規(guī)格書

FEATURES GENERAL DESCRIPTION

? Multiple input formats supported:

— HDMI Receiver compliant with HDMI 1.4

specification and DVI 1.0 specification.

Support input resolution up to 1080p. Support

Hot Plug detection for HDMI/DVI

— Single channel 18-bit/24-bit LVDS receiver

support display resolution up to 1366x768

— ITU-R 601 or ITU-R 656 compatible YCbCr

4:2:2 input format with embedded syncs.

Support resolution up to 1280 x 720@60Hz for

YCbCr 4:2:2 input

? Support multiple output formats:

— SDTV format (CVBS or S-Video output, NTSC

and PAL)

— HDTV format (YPbPr output) for 480p, 576p,

720p, 1080i and 1080P

— Single channel 18-bit/24-bit LVDS transmitter

support display resolution up to 1366x768

— Analog RGB output for VGA with Triple 9-bit

DAC up to 200MHz pixel rate. Sync signals can

be provided in separated or composite manner.

Support VESA and CEA timing standards up to

UXGA and 1920x1080@60Hz

— ITU-R 601 or ITU-R 656 compatible YCbCr

4:2:2 output format with embedded syncs or

separate syncs. Support resolution up to 1280 x

720@60Hz for YCbCr 4:2:2 output

? On-chip Audio encoder which support 8 channel

IIS/ S/PDIF audio output

? Flexible scaler engine embedded

? VGA output is compliant with VESA VSIS v1r2

specification

? MCU embedded to handle the control logic

? Support device boot up by automatically loading

firmware from EEPROM

? Integrated EDID Buffer

? OSD controller support

? TV connection detection supported

? HDMI input detection supported

? Support Auto Power Saving mode and low stand-by

current

? Support 422 to 444 conversion

? Support RGB to YCC conversion in ITU-R BT.601

and 709 color space for SDTV/HDTV/BT656

output

? IIC slave interface is available for debug and

Chrontel’s CH7117B is an innovative semiconductor

device that consists of HDMI receiver, single channel

LVDS receiver/transmitter, three separate 9-bit video

Digital-to-Analog Converters (DACs), SDTV encoder,

HDTV encoder, YCbCr 4:2:2 decoder/encoder and audio

encoder, which can convert HDMI / LVDS / BT656

signals into CVBS / S-Video / YPbPr / LVDS / BT656 /

Analog RGB outputs with IIS or SPDIF audio output.

The HDMI receiver integrated is compliant with HDMI

1.4b. The DACs are based on current source architecture.

The single channel LVDS receiver/transmitter complies

with the SPWG or OpenLDI specification, popular LVDS

standards used by panel manufacturers. Each input/output

LVDS interface is equipped with 4/1 pairs of differential

signal buses to support video data and clock. The device’s

LVDS receiver/transmitter can accept/output maximum

video clock frequency for up to 85MHz or 1366x768

resolution in 24-bit color per pixel.

With a powerful scaling engine working together with

other video processing circuits, CH7117B will convert the

captured input signal with resolution up to

1920x1080@60Hz, which is stored in the internal DDR

RAM, into analog video format or LVDS/BT656 signal

with any specified resolution.

With sophisticated MCU Embedded, CH7117B support

auto-boot and EDID buffer. Leveraging Firmware auto

loaded from the External EEPROM, CH7117B can

support HDMI input detection, DAC connection detection

and can be programmed to enter into Power Saving mode

automatically.

The CH7117B also supports up to 8-channel audio input

from HDMI port and output from the special audio output

port with sample rate up to 192 KHz. Available audio

bandwidth depends on the pixel clock frequency, the video

format timing, and whether or not content protection

re-synchronization is needed.

firmware update.

? Low power architecture

? RoHS compliant and Halogen free package

? Offered in 88 pin QFN package

APPLICATIONS

? Car Infotainment Device

? Converter Box

? Tablet Device

? OTT/IPTV Box