CLA4609-086LF-EK1中文資料思佳訊數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Features

? Low thermal resistance: 25 °C/W

? Typical threshold level: +36 dBm

? Low capacitance: 0.6 pF

? Low-profile, ultra-miniature QFN (3-pin, 2 x 2 mm) package

(MSL1, 260 °C per JEDEC J-STD-020)

Description

The CLA4609-086LF is a surface-mountable, low-capacitance,

dual parallel, shunt-connected, PIN limiter diode for high power

applications from 10 MHz to 6 GHz.

Maximum resistance at 100 mA is 1.5 Ω and maximum

capacitance at 30 V is 0.6 pF. The combination of low junction

capacitance, low parasitic inductance, low thermal resistance,

and nominal 20 um I-region width, makes the CLA4609-086LF

useful in large signal limiter applications. The threshold level is

+36 dBm, typical.

A block diagram of the CLA4609-086LF is shown in Figure 1.