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CS18LV02565API-70中文資料etc未分類制造商數(shù)據(jù)手冊PDF規(guī)格書

CS18LV02565API-70
廠商型號

CS18LV02565API-70

功能描述

HIGH SPEED SUPER LOW POWER SRAM

文件大小

294.06 Kbytes

頁面數(shù)量

14

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企業(yè)簡稱

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中文名稱

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原廠標(biāo)識
數(shù)據(jù)手冊

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更新時(shí)間

2025-1-6 10:26:00

CS18LV02565API-70規(guī)格書詳情

[CHIPLUS]

GENERAL DESCRIPTION

The CS18LV02565 is a high performance, high speed and super low power CMOS Static Random Access Memory organized as 32,768 words by 8bits and operates for a single 4.5 to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed, super low power features and maximum access time of 55/70ns in 5.0V operation. Easy memory expansion is provided by an active LOW chip enable (/CE) and active LOW output enable (/OE).

FEATURES

Wide operation voltage : 4.5 ~ 5.5V

Ultra low power consumption : 2mA@1MHz (Max.) , Vcc=5.0V.

1.0 uA (Typ.) CMOS standby current

High speed access time : 55/70ns.

Automatic power down when chip is deselected.

Three state outputs and TTL compatible.

Data retention supply voltage as low as 1.5V.

Easy expansion with /CE and /OE options.

產(chǎn)品屬性

  • 型號:

    CS18LV02565API-70

  • 功能描述:

    HIGH SPEED SUPER LOW POWER SRAM

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