CS8900A-IQ3集成電路（IC）的控制器規(guī)格書PDF中文資料

CS8900A-IQ3屬于集成電路（IC）的控制器。由凌云邏輯制造生產(chǎn)的CS8900A-IQ3控制器該系列產(chǎn)品主要用于在采用不同通信協(xié)議和/或信令方法的端點(diǎn)之間提供信息連接。示例包括將 I2C 總線連接到 UART，將 USB 連接到 I2C、SPI、以太網(wǎng)或 UART、以太網(wǎng) MAC 和 PHY 等的器件。此外，還包括用于通過為點(diǎn)對點(diǎn)通信設(shè)計的接口建立多路連接的器件，例如 USB 集線器控制器。

DESCRIPTION

The CS8900A is a low-cost Ethernet LAN Controller optimized for the Industry Standard Architecture (ISA) bus and general purpose microcontroller busses. Its highly integrated design eliminates the need for costly external components required by other Ethernet controllers. The

CS8900A includes on-chip RAM, 10BASE-T transmit and receive filters, and a direct ISA-Bus interface with 24 mA Drivers.

FEATURES

Single-Chip IEEE 802.3 Ethernet Controller with Direct ISA-Bus Interface

Maximum Current Consumption = 55 mA (5V Supply)

3V or 5V Operation

Industrial Temperature Range

Comprehensive Suite ofSoftware Drivers Available

Efficient PacketPage? Architecture Operates in I/O and Memory Space, and as DMA Slave

Full Duplex Operation

On-Chip RAM Buffers Transmit and Receive Frames

10BASE-T Port with Analog Filters, Provides:

- Automatic Polarity Detection and Correction

AUI Port for 10BASE2, 10BASE5 and 10BASE-F

Programmable Transmit Features:

- Automatic Re-transmission on Collision

- Automatic Padding and CRC Generation

Programmable Receive Features:

- Stream Transfer? for Reduced CPU Overhead

- Auto-Switch Between DMA and On-Chip Memory

- Early Interrupts for Frame Pre-Processing

- Automatic Rejection of Erroneous Packets