CXK77V3211Q中文資料索尼數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Description

The CXK77V3211Q is a 32K × 32 high performance synchronous SRAM with a 2-bit burst counter and output register. All synchronous inputs pass through register controlled by a positive-edge-triggered single clock input (CLK).

Features

? Fast address access times and High frequency operation

? 5V tolerant inputs except I/O pins

? A FT pin for pipelined or flow-thru architecture

? A LBO mode pin as burst control pin (i486/Pentium? and Linear burst sequence)

? Single +3.3V power supply

? Common data inputs and data outputs

? All inputs and outputs are LVTTL compatible

? Four Individual BYTE WRITE enables, GLOBAL WRITE and BYTE WRITE ENABLE

? Three Chip Enables for simple depth expansion

? One cycle output disable for both pipelined and flow-thru operation

? Internal input registers for address, data and control signals

? Self-timed WRITE cycle

? Write pass through capability

? High 30pF output drive capability at rated access time

? A ZZ pin for powerdown

? 100-lead QFP package for high density, high speed operation +10 – 5