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CY23S08SC-2中文資料賽普拉斯數(shù)據(jù)手冊PDF規(guī)格書
CY23S08SC-2規(guī)格書詳情
Functional Description
The CY23S08 is a 3.3V zero delay buffer designed to distribute high speed clocks in PC, workstation, datacom, telecom, and other high performance applications.
The part has an on-chip PLL which locks to an input clock presented on the REF pin. The PLL feedback must be driven into the FBK pin, and obtained from one of the outputs. The input-to-output propagation delay is less than 350 ps, and output-to-output skew is less than 250 ps.
Features
■ Zero input output propagation delay, adjustable by capacitive load on FBK input
■ Multiple configurations (see Table 3 on page 3)
■ Multiple low-skew outputs
? 45 ps typical output-output skew (–1)
? Two banks of four outputs, three-stateable by two select inputs
■ 10 MHz to 140 MHz operating range
■ 65 ps typical cycle-cycle jitter (–1, –1H)
■ Advanced 0.65μ CMOS technology
■ Space saving 16-pin, 150-mil SOIC/TSSOP packages
■ 3.3V operation
■ Spread Aware
產(chǎn)品屬性
- 型號:
CY23S08SC-2
- 制造商:
CYPRESS
- 制造商全稱:
Cypress Semiconductor
- 功能描述:
3.3V Zero Delay Buffer
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
CYPRESS |
22+23+ |
SOP |
36351 |
絕對原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價(jià) | ||
CYPRESS |
05+ |
SOP-16 |
100 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價(jià) | ||
CYPRESS(賽普拉斯) |
23+ |
SOIC16 |
6000 |
誠信服務(wù),絕對原裝原盤 |
詢價(jià) | ||
CYPRESS |
SOP16 |
68900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) | |||
CYPRESS |
22+ |
SOP |
8000 |
原裝正品支持實(shí)單 |
詢價(jià) | ||
CY |
24+ |
SOP16 |
142 |
詢價(jià) | |||
Cypress |
SOP |
40 |
Cypress一級分銷,原裝原盒原包裝! |
詢價(jià) | |||
CYPRESS/賽普拉斯 |
22+ |
SOP-16 |
9800 |
只做原裝正品假一賠十!正規(guī)渠道訂貨! |
詢價(jià) | ||
CYPRESS |
新 |
13 |
全新原裝 貨期兩周 |
詢價(jià) | |||
CYPRESS/賽普拉斯 |
22+ |
SOP16 |
62100 |
鄭重承諾只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) |