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CY7B992-2中文資料賽普拉斯數(shù)據(jù)手冊(cè)PDF規(guī)格書

CY7B992-2
廠商型號(hào)

CY7B992-2

功能描述

Programmable Skew Clock Buffer

文件大小

288.21 Kbytes

頁面數(shù)量

15

生產(chǎn)廠商 CypressSemiconductor
企業(yè)簡(jiǎn)稱

Cypress賽普拉斯

中文名稱

賽普拉斯半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-3 18:05:00

CY7B992-2規(guī)格書詳情

Functional Description

The CY7B991 and CY7B992 Programmable Skew Clock Buffers (PSCB) offer user selectable control over system clock functions. These multiple output clock drivers provide the system integrator with functions necessary to optimize the timing of high performance computer systems. Each of the eight individual drivers, arranged in four pairs of user controllable outputs, can drive terminated transmission lines with impedances as low as 50Ω. They can deliver minimal and specified output skews and full swing logic levels (CY7B991 TTL or CY7B992 CMOS).

Features

■ All output pair skew <100 ps typical (250 maximum)

■ 3.75 to 80 MHz output operation

■ User selectable output functions

? Selectable skew to 18 ns

? Inverted and non-inverted

? Operation at 1?2 and 1?4 input frequency

? Operation at 2x and 4x input frequency (input as low as 3.75 MHz)

■ Zero input to output delay

■ 50 duty cycle outputs

■ Outputs drive 50Ω terminated lines

■ Low operating current

■ 32-pin PLCC/LCC package

■ Jitter

產(chǎn)品屬性

  • 型號(hào):

    CY7B992-2

  • 制造商:

    CYPRESS

  • 制造商全稱:

    Cypress Semiconductor

  • 功能描述:

    Programmable Skew Clock Buffer

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