CY7C04312BV-133中文資料賽普拉斯數(shù)據(jù)手冊PDF規(guī)格書

Functional Description

The CY7C043XXBV is a family of 10 Gb/s, true four-ported Datapath Switching Elements with port speeds of up to 133 MHz[1]. The members of the family include 1-Mb (64K ×18), ?-Mb (32K x18), and ?-Mb (16K × 18) options. All four ports may be clocked at independent frequencies from one another. Simultaneous reads are allowed for accesses to the same address location; however, simultaneous reading and writing to the same address is not allowed. Any port can write to a certain location while other ports are reading that location simultaneously, if the timing spec for port to port delay (tCCS) is met. The result of writing to the same location by more than one port at the same time is undefined.

Features

? QuadPort? datapath switching element (DSE) family allows four independent ports of access for data path management and switching

? High-bandwidth data throughput up to 10 Gb/s

? 133-MHz[1] port speed x 18-bit-wide interface × 4 ports

? High-speed clock to data access 4.2 ns (max.)

? Synchronous pipelined devices

— 1-Mb, ?-Mb, and ?-Mb switch arrays

— 64K/32K/16K × 18 device options

? 0.25-micron CMOS for optimum speed/power

? IEEE 1149.1 JTAG boundary scan

? Width and depth expansion capabilities

? BIST (Built-In Self-Test) controller

? Dual Chip Enables on all ports for easy depth expansion

? Separate upper-byte and lower-byte controls on all ports

? Simple array partitioning (CY7C0430BV only)

— Internal mask register controls counter wrap-around

— Counter-Interrupt flags to indicate wrap-around

— Counter and mask registers readback on address

? 272-ball BGA package (27-mm × 27-mm × 1.27-mm ball pitch)

? Commercial and industrial temperature ranges

? 3.3V low operating power

— Active = 750 mA (maximum)

— Standby = 15 mA (maximum