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CY7C139AV-20JC中文資料賽普拉斯數(shù)據(jù)手冊PDF規(guī)格書

CY7C139AV-20JC
廠商型號

CY7C139AV-20JC

功能描述

3.3V 4K/8K/16K/32K x 8/9 Dual-Port Static RAM

文件大小

544.52 Kbytes

頁面數(shù)量

20

生產(chǎn)廠商 CypressSemiconductor
企業(yè)簡稱

Cypress賽普拉斯

中文名稱

賽普拉斯半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-2-8 13:07:00

CY7C139AV-20JC規(guī)格書詳情

Functional Description

The CY7C138AV/144AV/006AV/007AV and CY7C139AV/145AV/ 016AV/017AV are low-power CMOS 4K, 8K, 16K, and 32K x8/9 dual-port static RAMs. Various arbitration schemes are included on the devices to handle situations when multiple processors access the same piece of data. Two ports are provided, permitting independent, asynchronous access for reads and writes to any location in memory.

Features

? True Dual-Ported memory cells which allow simultaneous access of the same memory location

? 4K/8K/16K/32K x 8 organizations (CY7C0138AV/144AV/006AV/007AV)

? 4K/8K/16K/32K x 9 organizations (CY7C0139AV/145AV/016AV/017AV)

? 0.35-micron CMOS for optimum speed/power

? High-speed access: 20/25 ns

? Low operating power

— Active: ICC = 115 mA (typical)

— Standby: ISB3 = 10 μA (typical)

? Fully asynchronous operation

? Automatic power-down

? Expandable data bus to 16/18 bits or more using Master/ Slave chip select when using more than one device

? On-chip arbitration logic

? Semaphores included to permit software handshaking between ports

? INT flag for port-to-port communication

? Pin select for Master or Slave

? Commercial and Industrial Temperature Ranges

? Available in 68-pin PLCC (all) and 64-pin TQFP (7C006AV & 7C144AV)

? Pb-Free packages available

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