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CY7C1514KV18-333BZC集成電路(IC)的存儲(chǔ)器規(guī)格書PDF中文資料

CY7C1514KV18-333BZC
廠商型號(hào)

CY7C1514KV18-333BZC

參數(shù)屬性

CY7C1514KV18-333BZC 封裝/外殼為165-LBGA;包裝為卷帶(TR);類別為集成電路(IC)的存儲(chǔ)器;產(chǎn)品描述:IC SRAM 72MBIT PARALLEL 165FBGA

功能描述

72-Mbit QDR-II SRAM 2-Word Burst Architecture

封裝外殼

165-LBGA

文件大小

814.94 Kbytes

頁面數(shù)量

30

生產(chǎn)廠商 CypressSemiconductor
企業(yè)簡(jiǎn)稱

Cypress賽普拉斯

中文名稱

賽普拉斯半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-15 22:30:00

CY7C1514KV18-333BZC規(guī)格書詳情

Functional Description

The CY7C1510KV18, CY7C1525KV18, CY7C1512KV18, and CY7C1514KV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedicated data outputs to support read operations and the write port has dedicated data inputs to support write operations. QDR-II architecture has separate data inputs and data outputs to completely eliminate the need to “turnaround” the data bus that exists with common I/O devices.

Features

■ Separate Independent Read and Write Data Ports

? Supports concurrent transactions

■ 333 MHz Clock for High Bandwidth

■ 2-word Burst on all Accesses

■ Double Data Rate (DDR) Interfaces on both Read and Write Ports (data transferred at 666 MHz) at 333 MHz

■ Two Input Clocks (K and K) for precise DDR timing

? SRAM uses rising edges only

■ Two Input Clocks for Output Data (C and C) to minimize Clock Skew and Flight Time mismatches

■ Echo Clocks (CQ and CQ) simplify Data Capture in High Speed Systems

■ Single Multiplexed Address Input bus latches Address Inputs for both Read and Write Ports

■ Separate Port Selects for Depth Expansion

■ Synchronous internally Self-timed Writes

■ QDR?-II operates with 1.5 Cycle Read Latency when DOFF is asserted HIGH

■ Operates similar to QDR-I Device with 1 Cycle Read Latency when DOFF is asserted LOW

■ Available in x8, x9, x18, and x36 Configurations

■ Full Data Coherency, providing Most Current Data

■ Core VDD = 1.8V (±0.1V); IO VDDQ = 1.4V to VDD

? Supports both 1.5V and 1.8V IO supply

■ Available in 165-ball FBGA Package (13 x 15 x 1.4 mm)

■ Offered in both Pb-free and non Pb-free Packages

■ Variable Drive HSTL Output Buffers

■ JTAG 1149.1 Compatible Test Access Port

■ Phase Locked Loop (PLL) for Accurate Data Placement

產(chǎn)品屬性

  • 產(chǎn)品編號(hào):

    CY7C1514KV18-333BZC

  • 制造商:

    Cypress Semiconductor Corp

  • 類別:

    集成電路(IC) > 存儲(chǔ)器

  • 包裝:

    卷帶(TR)

  • 存儲(chǔ)器類型:

    易失

  • 存儲(chǔ)器格式:

    SRAM

  • 技術(shù):

    SRAM - 同步,QDR II

  • 存儲(chǔ)容量:

    72Mb(2M x 36)

  • 存儲(chǔ)器接口:

    并聯(lián)

  • 電壓 - 供電:

    1.7V ~ 1.9V

  • 工作溫度:

    0°C ~ 70°C(TA)

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    165-LBGA

  • 供應(yīng)商器件封裝:

    165-FBGA(13x15)

  • 描述:

    IC SRAM 72MBIT PARALLEL 165FBGA

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
Cypress
2020+
80000
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增
詢價(jià)
CYPRESS
23+
165FBGA
4568
原廠原裝正品現(xiàn)貨,代理渠道,支持訂貨!!!
詢價(jià)
CYPRESS(賽普拉斯)
23+
LBGA165
7350
現(xiàn)貨供應(yīng),當(dāng)天可交貨!免費(fèi)送樣,原廠技術(shù)支持!!!
詢價(jià)
CYPRESS
2016+
FBGA165
3526
假一罰十進(jìn)口原裝現(xiàn)貨原盤原標(biāo)!
詢價(jià)
CYPRESS SEMICONDUCTOR/賽普拉斯
兩年內(nèi)
N/A
2127
原裝現(xiàn)貨,實(shí)單價(jià)格可談
詢價(jià)
Infineon Technologies
23+/24+
165-LBGA
8600
只供原裝進(jìn)口公司現(xiàn)貨+可訂貨
詢價(jià)
Cypress Semiconductor Corp
21+
88-TFBGA,CSPBGA
5280
進(jìn)口原裝!長期供應(yīng)!絕對(duì)優(yōu)勢(shì)價(jià)格(誠信經(jīng)營
詢價(jià)
Cypress
23+
165-FBGA(13x15)
9550
專業(yè)分銷產(chǎn)品!原裝正品!價(jià)格優(yōu)勢(shì)!
詢價(jià)
Cypress
22+
165FBGA (13x15)
9000
原廠渠道,現(xiàn)貨配單
詢價(jià)
Cypress Semiconductor Corp
23+
165-FBGA13x15
7300
專注配單,只做原裝進(jìn)口現(xiàn)貨
詢價(jià)