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CY7C404-25DMB中文資料賽普拉斯數(shù)據(jù)手冊(cè)PDF規(guī)格書

CY7C404-25DMB
廠商型號(hào)

CY7C404-25DMB

功能描述

64 x 4 Cascadable FIFO / 64 x 5 Cascadable FIFO

文件大小

270.78 Kbytes

頁面數(shù)量

13

生產(chǎn)廠商 CypressSemiconductor
企業(yè)簡(jiǎn)稱

Cypress賽普拉斯

中文名稱

賽普拉斯半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-1-13 20:17:00

CY7C404-25DMB規(guī)格書詳情

Functional Description

The CY7C401 and CY7C403 are asynchronous first-in first-out (FIFOs) organized as 64 four-bit words. The CY7C402 and CY7C404 are similar FIFOs organized as 64 five-bit words. Both the CY7C403 and CY7C404 have an output enable (OE) function.

Features

? 64 x 4 (CY7C401 and CY7C403) 64 x 5 (CY7C402 and CY7C404) High-speed first-in first-out memory (FIFO)

? Processed with high-speed CMOS for optimum speed/power

? 25-MHz data rates

? 50-ns bubble-through time—25 MHz

? Expandable in word width and/or length

? 5-volt power supply ± 10 tolerance, both commercial and military

? Independent asynchronous inputs and outputs

? TTL-compatible interface

? Output enable function available on CY7C403 and CY7C404

? Capable of withstanding greater than 2001V electrostatic discharge

? Pin compatible with MMI 67401A/67402A

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