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CY7C4261V-15JC中文資料賽普拉斯數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

CY7C4261V-15JC
廠商型號(hào)

CY7C4261V-15JC

功能描述

16K/32K/64K/128K x 9 Low-Voltage Deep Sync FIFOs

文件大小

205.47 Kbytes

頁(yè)面數(shù)量

16 頁(yè)

生產(chǎn)廠商 CypressSemiconductor
企業(yè)簡(jiǎn)稱

Cypress賽普拉斯

中文名稱

賽普拉斯半導(dǎo)體公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2024-12-29 18:06:00

CY7C4261V-15JC規(guī)格書(shū)詳情

Functional Description

The CY7C4261/71/81/91V are high-speed, low-power FIFO memories with clocked read and write interfaces. All are nine bits wide. The CY7C4261/71/81/91V are pin-compatible to the CY7C42x1V Synchronous FIFO family.

Features

? 3.3V operation for low power consumption and easy

integration into low-voltage systems

? High-speed, low-power, first-in first-out (FIFO)

memories

? 16K × 9 (CY7C4261V)

? 32K × 9 (CY7C4271V)

? 64K × 9 (CY7C4281V)

? 128K × 9 (CY7C4291V)

? 0.35-micron CMOS for optimum speed/power

? High-speed 100-MHz operation (10-ns read/write cycle

times)

? Low power

— ICC = 25 mA

— ISB = 4 mA

? Fully asynchronous and simultaneous read and write

operation

? Empty, Full, and programmable Almost Empty and

Almost Full status flags

? Output Enable (OE) pin

? Independent read and write enable pins

? Supports free-running 50 duty cycle clock inputs

? Width- Expansion capability

? Pin-compatible 3.3V solutions for CY7C4261/71/81/91

? Pin-compatible density upgrade to CY7C42X1V family

? Pb-Free Packages Available

產(chǎn)品屬性

  • 型號(hào):

    CY7C4261V-15JC

  • 制造商:

    Cypress Semiconductor

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