CYRS17B512-133AZMB中文資料英飛凌數(shù)據(jù)手冊(cè)PDF規(guī)格書

Features

? Serial Peripheral Interface (SPI) with Multi-I/O

- Clock polarity and phase modes 0 and 3

- Quad peripheral interface (QPI) option

- Extended addressing: 24- or 32-bit address options

? Read

- Commands: SPI, Quad I/O

- Modes: Quad Data, Quad I/O, QPI, Continuous (XIP)

- Serial flash discoverable parameters (SFDP) for configuration information.

? Program architecture

- 2K bytes page programming buffer

? Erase architecture

- Uniform 1 MB sector erase

- Uniform 8 MB block erase

- Chip erase

- Erase suspend and resume mode for block and sector erase

? 1,000 program/erase cycles (T = 125°C)

? 10 year data retention (T = 125°C)

? Security features

- Block protection: flexible Block range

? Technology

- 40 nm SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) charge trap memory technology

? Single supply voltage

- VDD = 2.97 V to 3.63 V

? CMOS I/O support

- VDDIO = 1.8 V and 3.3 V support

? Temperature range / grade

- Military (–55°C to +125°C)

? Package

- 68-lead ceramic quad flatpack (68QFP)

- 100-lead thin quad flatpack (100TQFP)

? Radiation data

- Total dose = > 300 krad

- Heavy ion single event effects:

? SEU immune

? SEFI < 4.75 × 10-5 upsets/dev-day

? Latch up immunity > 81 MeV.cm2/mg (125°C)