D9LVRA2DEMRQ1中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

1 Features

? AEC-Q100 and AEC-Q006 qualified for automotive

applications

– Temperature grade 2: ?40°C to +105°C

? 600Mbps (300MHz) switching rates

? 50ps differential skew (typical)

? 0.1ns channel-to-channel skew (typical)

? Supports 1.8V to 3.3V power supply

? Flow-through pinout

? Power down high impedance on LVDS inputs

? Output slew rate control

? LVDS inputs accept LVDS/CML/LVPECL signals

? Conforms to ANSI/TIA/EIA-644 standard

? Pin compatible with DS90LV028A-Q1

2 Applications

? Automotive infotainment and cluster

? Automotive head unit

3 Description

The DS90LVRA2-Q1 is a dual CMOS differential line

receiver designed for applications requiring high input

common mode range, high data rates, and CMOS

output with slew rate control. The device is designed

to support data rates of 600Mbps (300MHz) utilizing

low voltage differential signaling (LVDS) technology.

The DS90LVRA2-Q1 accepts low voltage (350mV

typical) differential input signals and translates them

from 1.8V to 3.3V CMOS output levels depending

on power supply voltage. The DS90LVRA2-Q1 has a

flow-through design for easy PCB layout.

The DS90LVRA2-Q1 and companion LVDS line driver

DS90LV027AQ provide a new alternative to high

power PECL/ECL devices for high speed point-topoint

interface applications.