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DDU4C-5100A2中文資料DATADELAY數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
廠商型號(hào) |
DDU4C-5100A2 |
功能描述 | 5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU4C) |
文件大小 |
55.67 Kbytes |
頁(yè)面數(shù)量 |
4 頁(yè) |
生產(chǎn)廠商 | Data Delay Devices, Inc. |
企業(yè)簡(jiǎn)稱(chēng) |
DATADELAY |
中文名稱(chēng) | Data Delay Devices, Inc.官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2024-11-17 11:10:00 |
DDU4C-5100A2規(guī)格書(shū)詳情
FUNCTIONAL DESCRIPTION
The DDU4C-series device is a 5-tap digitally buffered delay line. The signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an amount determined by the device dash number (See Table). The total delay of the line is measured from IN to T5. The nominal tap-to-tap delay increment is given by one-fifth of the total delay.
FEATURES
· Five equally spaced outputs
· Fits standard 8-pin DIP socket
· Low profile
· Auto-insertable
· Input & outputs fully CMOS interfaced & buffered
· 10 T2 L fan-out capability
產(chǎn)品屬性
- 型號(hào):
DDU4C-5100A2
- 制造商:
DATADELAY
- 制造商全稱(chēng):
Data Delay Devices, Inc.
- 功能描述:
5-TAP, HCMOS-INTERFACED FIXED DELAY LINE(SERIES DDU4C)
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---|---|---|---|---|---|---|---|
DATADELAYDEVICES |
23+ |
10000 |
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詢(xún)價(jià) | |||
SUNELECTRONIC |
24+ |
DIP-9 |
68900 |
一站配齊 原盒原包現(xiàn)貨 朱S Q2355605126 |
詢(xún)價(jià) | ||
N/A |
2318+ |
原裝 |
4862 |
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詢(xún)價(jià) | ||
DATADELAY |
21+ |
35200 |
一級(jí)代理/放心采購(gòu) |
詢(xún)價(jià) | |||
N/A |
QQ咨詢(xún) |
189-8877-7135 |
73 |
全新原裝 研究所指定供貨商 |
詢(xún)價(jià) | ||
3D |
2046+ |
9852 |
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詢(xún)價(jià) | |||
N/A |
18+ |
185 |
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詢(xún)價(jià) | |||
DDD |
10+ |
NA |
100 |
終端備貨原裝現(xiàn)貨-軍工器件供應(yīng)商 |
詢(xún)價(jià) | ||
CINCH |
20+ |
連接器 |
493 |
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詢(xún)價(jià) | ||
JAE |
23+ |
NA |
100 |
D-SUB連接器 |
詢(xún)價(jià) |