首頁(yè)>DDU66C-200ME7>規(guī)格書(shū)詳情
DDU66C-200ME7中文資料DATADELAY數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)
DDU66C-200ME7規(guī)格書(shū)詳情
FUNCTIONAL DESCRIPTION
The DDU66C-series device is a 5-tap digitally buffered delay line. The signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an amount given by the device dash number. For dash numbers less than 40, the total delay of the line is measured from T1 to T5, with the nominal value given by the dash number. The nominal tap-to-tap delay increment is given by 1/4 of this number. The inherent delay from IN to T1 is nominally 8.0ns. For dash numbers greater than or equal to 40, the total delay of the line is measured from IN to T5, with the nominal value given by the dash number. The nominal tap-to-tap delay increment is given by 1/5 of this number.
FEATURES
? Five equally spaced outputs
? Fits standard 14-pin DIP socket
? Low profile
? Auto-insertable
? Input & outputs fully CMOS interfaced & buffered
? 10 T2L fan-out capability
產(chǎn)品屬性
- 型號(hào)：
DDU66C-200ME7
- 制造商：
DATADELAY
- 制造商全稱：
Data Delay Devices, Inc.
- 功能描述：
5-TAP, HCMOS-INTERFACED FIXED DELAY LINE(SERIES DDU66C)
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|---|---|---|---|---|---|---|---|
N/A |
21+ |
NA |
645 |
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MPI/MP |
23+ |
NA/ |
3305 |
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55 |
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144 |
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詢價(jià) | ||
23+ |
65480 |
詢價(jià) | |||||
DATADELAY |
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35200 |
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N/A |
QQ咨詢 |
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73 |
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DDD |
24+ |
45 |
詢價(jià) |
