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DRV8329B-Q1中文資料德州儀器數(shù)據(jù)手冊PDF規(guī)格書

廠商型號 |
DRV8329B-Q1 |
功能描述 | DRV8329-Q1 4.5 to 60V Three-phase BLDC Gate Driver |
文件大小 |
3.28689 Mbytes |
頁面數(shù)量 |
58 頁 |
生產(chǎn)廠商 | Texas Instruments |
企業(yè)簡稱 |
TI【德州儀器】 |
中文名稱 | 美國德州儀器公司官網(wǎng) |
原廠標(biāo)識 | ![]() |
數(shù)據(jù)手冊 | |
更新時間 | 2025-3-4 15:00:00 |
人工找貨 | DRV8329B-Q1價格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
DRV8329B-Q1規(guī)格書詳情
1 Features
? 65V Three Phase Half-Bridge Gate Driver
– Drives 3 High-Side and 3 Low-Side N-Channel
MOSFETs (NMOS)
– 4.5 to 60V Operating Voltage Range
– Supports 100% PWM Duty Cycle with Trickle
Charge pump
? Bootstrap based Gate Driver Architecture
– 1000mA Maximum Peak Source Current
– 2000mA Maximum Peak Sink Current
? Integrated Current Sense Amplifier with low input
offset (optimized for 1 shunt)
– Adjustable Gain (5, 10, 20, 40V/V)
? Hardware interface provides simple configuration
? Ultra-low power sleep mode <1uA at 25 ?C
? 4ns (typ) propagation delay matching between
phases
? Independent driver shutdown path (DRVOFF)
? 65V tolerant wake pin (nSLEEP)
? Supports negative transients upto -10V on SHx
? 6x and 3x PWM Modes
? Supports 3.3V, and 5V Logic Inputs
? Accurate LDO (AVDD), 3.3V ±3%, 80mA
? Compact QFN Packages and Footprints
? Adjustable VDS overcurrent threshold through
VDSLVL pin
? Adjustable deadtime through DT pin
? Efficient System Design With Power Blocks
? Integrated Protection Features
– PVDD Undervoltage Lockout (PVDDUV)
– GVDD Undervoltage (GVDDUV)
– Bootstrap Undervoltage (BST_UV)
– Overcurrent Protection (VDS_OCP, SEN_OCP)
– Thermal Shutdown (OTSD)
– Fault Condition Indicator (nFAULT)
2 Applications
? Brushless-DC (BLDC) Motor Modules and PMSM
? Automotive Pumps
? Automotive HVAC fans
? E-Bikes, E-Scooters, and E-Mobility
? Automotive Body Electronics (Window, Door,
Sunroof, Seat, Wiper) Modules
3 Description
The DRV8329-Q1 family of devices is an integrated
gate driver for three-phase applications. The devices
provide three half-bridge gate drivers, each capable
of driving high-side and low-side N-channel power
MOSFETs. The device generates the correct gate
drive voltages using an internal charge pump and
enhances the high-side MOSFETs using a bootstrap
circuit. A trickle charge pump is included to support
100% duty cycle. The Gate Drive architecture
supports peak gate drive currents up to 1A source
and 2A sink. The DRV8329-Q1 can operate from a
single power supply and supports a wide input supply
range of 4.5 to 60V.
The 6x and 3x PWM modes allow for simple
interfacing to controller circuits. The device has
integrated accurate 3.3V LDO that can be used
to power external controller and can be used as
reference for CSA. The configuration settings for the
device are configurable through hardware (H/W) pins.
The DRV8329-Q1 devices integrate low-side current
sense amplifier that allow current sensing for sum of
current from all three phases of the drive stage.
A low-power sleep mode is provided to achieve
low quiescent current by shutting down most of
the internal circuitry. Internal protection functions
are provided for undervoltage lockout, GVDD fault,
MOSFET overcurrent, MOSFET short circuit, and
overtemperature. Fault conditions are indicated on
nFAULT pin.