DS1100-500中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The DS1100 series delay lines have five equally spaced taps providing delays from 4ns to 500ns. These devices are offered in 8-pin DIPs and surface-mount packages to save PC board area. Low cost and superior reliability over hybrid technology is achieved by the combination of a 100 silicon delay line and industry-standard DIP and SO packaging. The DS1100 5-tap silicon delay line reproduces the input logic state at the output after a fixed delay as specified by the extension of the part number after the dash. The DS1100 is designed to reproduce both leading and trailing edges with equal precision. Each tap is capable of driving up to ten 74LS loads.

FEATURES

? All-Silicon Timing Circuit

? Five Taps Equally Spaced

? 5V Operation

? Delays are Stable and Precise

? Both Leading- and Trailing-Edge Accuracy

? Improved Replacement for DS1000

? Low-Power CMOS

? TTL/CMOS-Compatible

? Vapor-Phase, IR, and Wave Solderable

? Custom Delays Available

? Fast-Turn Prototypes

? Delays Specified Over Both Commercial and Industrial Temperature Ranges