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DS1100_11中文資料美信數(shù)據(jù)手冊(cè)PDF規(guī)格書

DS1100_11
廠商型號(hào)

DS1100_11

功能描述

5-Tap Economy Timing Element (Delay Line) All-Silicon Timing Circuit

文件大小

136.49 Kbytes

頁面數(shù)量

6

生產(chǎn)廠商 Maxim Integrated Products
企業(yè)簡稱

Maxim美信

中文名稱

美信半導(dǎo)體官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2024-11-16 22:59:00

DS1100_11規(guī)格書詳情

GENERAL DESCRIPTION

The DS1100 series delay lines have five equally spaced taps providing delays from 4ns to 500ns. These devices are offered in surface-mount packages to save PCB area. Low cost and superior reliability over hybrid technology is achieved by the combination of a 100 silicon delay line and industry-standard μMAX and SO packaging. The DS1100 5-tap silicon delay line reproduces the input-logic state at the output after a fixed delay as specified by the extension of the part number after the dash. The DS1100 is designed to reproduce both leading and trailing edges with equal precision. Each tap can drive up to 10 74LS loads.

FEATURES

■ All-Silicon Timing Circuit

■ Five Taps Equally Spaced

■ 5V Operation

■ Delays are Stable and Precise

■ Both Leading- and Trailing-Edge Accuracy

■ Improved Replacement for DS1000

■ Low-Power CMOS

■ TTL/CMOS-Compatible

■ Vapor-Phase, IR, and Wave Solderable

■ Custom Delays Available

■ Fast-Turn Prototypes

■ Delays Specified Over Both Commercial and Industrial Temperature Ranges

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產(chǎn)品屬性

  • 型號(hào):

    DS1100_11

  • 制造商:

    MAXIM

  • 制造商全稱:

    Maxim Integrated Products

  • 功能描述:

    5-Tap Economy Timing Element(Delay Line) All-Silicon Timing Circuit

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10
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3550
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